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Question:

Consider a system with 4KB pages with page size 512byte and Physical Address is 32 bits. Where each PTE contains 1 valid bit, 1-Reference bit, 3-permission bits. What is the Logical Address and Page Table Size (PTS).

Solution:

Given Data:

Number of pages = 4KB = ${\mathbf{2}}^{\mathbf{12}}$, Page size = 512 byte = ${\mathbf{2}}^{\mathbf{9}}$, Physical Address (PA) = 32 bit.

Logical Address (LA):

Logical Address Space (LAS) =

So, Logical Address = 21 bits

Page Table Size (PTS):

Page Table Size (PTS) = Number of pages × Page entry size

Now entry contains here 1 valid bit, 1-Reference bit, 3-permission bits, and frame number.

Here we have to calculate the bits required for the frame number.

Now, Physical Address (PA) = 32 bit, Page size = 512 byte = ${\mathbf{2}}^{\mathbf{9}}$ is given.

So, offset = 9 bits

Now, we elaborate the address fields of Physical Address (PA):

So, bit require in frame number = 32 bits – 9 bits = 23 bits

So, page entry size =1 (valid bit) + 1 (Reference bit) + 3 (permission bits) + 23 (frame no.)

= 28 bits.

Then Page Table Size (PTS) = Number of pages × Page entry size

Question: UGC NET 2018

Dirty bit is used to show the

(a) Wrong page

(b) Page with corrupted data

(c) Page with low frequency occurrence

(d) Page that is modified after being loaded into the cache memory

You should know:

Before seeing the solution please follow the Number of information at Page Entry 

Solution:

Option (d) is correct because as we know dirty bit or modified bit is identified a certain page is modified or not at the time of execution.