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Examples: Minimum NAND and NOR

 

Before seeing examples please follow the previous chapter: 

Design circuit with Minimum NAND, Design circuit with Minimum NOR

 

Question 1:

How many minimum 2-pin NAND gate and NOR gate require to implement the expression AB + C.

 

Solution: 

First, we calculate how many NOR gates require.

So, we first require the expression as POS form

 

The given expression (AB + C) is SOP. We can convert the SOP to POS by Transposition Theorem.

AB + C = (A + C) (B + C) [∵ A + BC = (A + C) (A + B) Transposition]

 

Now draw the circuit

 

Now we can convert the two-level OR-AND (POS) hierarchy to NOR (By double bubble)

 

 

This equals to

 

 

Because,

 

 

So, we need 3 NOR to implement (AB + C)

 

Now design the circuit for expression (AB + C) using minimum NAND gate.

AB + C is already SOP. So, we can implement it by minimum NAND gate.

 

 

Now put not bubble both sides to cancel it.

 

 

Now replace

 

 

 

So, a minimum of 3 NAND gate require.

 

Answer: 3 NOR and 3 NAND gate minimum require to implement (AB + C).

 

Question 2:

How many minimum numbers of NAND gate require to implement expression:

Solution:

From the expression, it is clear that –

 

 

So, we take it as x

So, x (C + D) is the expression now and make it SOP form.

xC + xD

 

 

We redesign it as:

 

 

 

Question 3:

How many NAND gate/gates is/are required to implement it?

(A) 7     

(B) 3     

(C) 4     

(D)

 

Solution:

To implement A, ‘0’ number of NAND gate is required.

 

Option (D) is the correct answer.

 

Question 4: 

How many NAND gate/gates is/are required to implement it?

(a) 3     

(b) 4     

(c)  5     

(d)

 

Solutions:

Now, to implement (A + B) (A simplified form of the given expression, 3 NAND gates are required).

 

So, Option (a) is the correct answer.