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Process of paging method: Address Translation

Important note: This chapter is very important for examination GATE/NET/SET/Engineering/Degree Courses. 

At least one question is asked in GATE/NET/SET/Other

We take an example and describe how the paging method works. 

Let memory size = 64 B, 

Let frame size = 4 B, 

Process Size = 16 B = Logical Address Space, Page size =4 B,

# Page size is 4B so, each page of the process contain 4 bytes like page number 0 (zero) contains byte number 0, 1, 2, 3 and page number 1 contains  4, 5, 6, 7 bytes, same way page 3 contains 8, 9, 10, 11 and page 4 contain 12, 13, 14, 15.

# As we know 0th location of the memory is generally not vacant for any process, so, we can assume that memory location frame 0 and frame 1 of the memory is already occupied. 

# All pages of the process are loaded into memory from frame number 2 to 5. (See above diagram).

# In this example logical address generated by CPU 0110 i.e. CPU asks for the word no. 6 (0110).

# We know logical address divided into two parts page number and offset. Total 4-bit address (0110) generate by CPU, now we calculate how many bit for the page number and how many bit of offset. 

# Bits require for the page number is depends on page size. Here page size is 4B, so how many bits will be required for page number: 

2 bits are required here for the page number.

# Number of bits for offset at logical address depends on the number of pages in the process. 

Here, 

2 bits are required here offset. 

# Least significant 2 bits are considered as page offset and the rest of 2 bits consider as the page number. 

Now Logical address received by MMU and with the help of the page table

convert it to a physical address.  Here page number 01 i.e.1 and offset 10 i.e. 2. 

# At page table MMU search page number 1 and get the corresponding frame number 3 i.e. frame 3 (see diagram). 

# Physical address has two parts frame number and offset.  Frame number coming from page table of the corresponding page number. 

# Number of bits required for frame number at physical address depends on the number of frames.

# Here 

So, 4 bit is required for the frame. And offset is the same as logical address because for logical and physical address offset is the same. LSB 2 bit is offset and the rest is frame number.

# Here frame number 0011 means 3 i.e. from the logical address we locate frame number 3 of page number 1 from the page table. (See diagram) 

# So, Page number 1 of the logical address is converted to corresponding frame number 3 and as we know page offset and frame offset is the same. 

# Now from frame number 3 of the memory location and offset 2 we will get 14 (Offset position always starting from 0) which is the actual location (address) of the word or by which the CPU wants to get from memory.

# So, when CPU wants to get a word and generate a logical address 6 (assume that this word is in at memory address 6), but MMU converts the logical address using page table to physical address (absolute address) 14 which is the actual memory address of this word. 

The conversion of the logical address to the physical address by MMU just converts page number to frame number because the offset is the same for both.