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- Introduction: OS
- Booting Process
- Command Interpreter
- Dual mode of operation
- System Calls
- Difference between system call and library call
- Interrupt and Trap
- Introduction
- Scheduling Criteria, Terms and Concepts
- Different Type Scheduling Algorithms
- Longest Job First
- Longest Remaining Time First
- Highest Response Ratio Next (HRRN)
- Priority Scheduling
- Least Completed Next (LCN) Scheduling
- Multi-Level Queue Scheduling
- Multilevel Feedback Queue Scheduling
- Guaranteed Scheduling
- Fair Share Scheduling
- Lottery Scheduling
- Multi-Processor Scheduling
- Deadline Scheduling
- Rate-Monotonic Scheduling
- POSIX Real-Time Scheduling
- Priority Inversion
- Proportional Share Scheduling
- Comparison table of Scheduling Algorithm
- Algorithm Evaluation for Scheduling
- Important concept of MM
- Memory Representation as Address
- Memory layout for a Process
- Logical and Physical Address Space
- Necessity of Memory Management
- Introduction
- Concept of Non-contiguous memory allocation
- Basic concept of Paging
- Address Translation
- Process of Paging Method
- Calculation of Offset for paging
- Calculation of Logical Address Bit and number of Pages
- Calculation of Physical Address Bit and number of Frames
- Calculation of Page Table Size
- Organization of MMU
- Why Page size power of 2
- Paging Address Calculation: example1
- Paging Numeric Problem: Example2
- Paging Address Calculation: Example3
- Paging Address Calculation: Question1
- Some Important Question 2
- Paging Address Translation: Question3
- UGC NET Paging Question
- GATE Paging Question
- Number of information at Page Entry
- Exams Question on Page Entry Information
- Exam Question: Page Entry Information
- Calculates Page Table Entry Size
- Calculates Page Size
- Calculation of Optimal Page Size
- Question on Optimal Page Size
- Hashed Page Table with Example
- Inverted Page Table with Gate Question
- Question on Inverted Page Table
- Multi-Level Paging
- Multi-level paging: Example1
- Multi-level paging: Example2
- Allocation of Frames
- Subject Mock
Multi-programming:
In a multi-programming system, several jobs or programs reside in the main memory at any given point of time, while one program is being processed, others wait in the queue, once a process is either completed or goes for I/O or preempted, the processor picks up some other process.
It increases CPU utilization, throughput, and degree of multiprogramming (number of processes at main memory) and enables multi-tasking. Here operating system switching over the CPU service from one process to another.
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Non-preemptive:
Here one process gets chance to control of the CPU only when it finishes with its current CPU time.
Example: DOS 3.1.
Preemptive:
Here the running process can be forced to release based on completion of the process or I/O or priority or time quantum.
Example:
Windows, Unix. Transfer of control of the process is called context switching.
Architecture that support multi-programming
(i) Direct Access Memory (DMA):
Process can directly access the memory for I/O operation without CPU intervention with the help of DMA.
(ii) Address Translations:
CPU issues a virtual/logical memory address and Memory Management Unit (MMU) translates it into a physical address to access the memory.
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(iii) Two-Mode operation:
CPU working with two different modes to run the processes.
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