FOR FREE MATERIALS
- Introduction: OS
- Booting Process
- Command Interpreter
- Dual mode of operation
- System Calls
- Difference between system call and library call
- Interrupt and Trap
- Introduction
- Scheduling Criteria, Terms and Concepts
- Different Type Scheduling Algorithms
- Longest Job First
- Longest Remaining Time First
- Highest Response Ratio Next (HRRN)
- Priority Scheduling
- Least Completed Next (LCN) Scheduling
- Multi-Level Queue Scheduling
- Multilevel Feedback Queue Scheduling
- Guaranteed Scheduling
- Fair Share Scheduling
- Lottery Scheduling
- Multi-Processor Scheduling
- Deadline Scheduling
- Rate-Monotonic Scheduling
- POSIX Real-Time Scheduling
- Priority Inversion
- Proportional Share Scheduling
- Comparison table of Scheduling Algorithm
- Algorithm Evaluation for Scheduling
- Important concept of MM
- Memory Representation as Address
- Memory layout for a Process
- Logical and Physical Address Space
- Necessity of Memory Management
- Introduction
- Concept of Non-contiguous memory allocation
- Basic concept of Paging
- Address Translation
- Process of Paging Method
- Calculation of Offset for paging
- Calculation of Logical Address Bit and number of Pages
- Calculation of Physical Address Bit and number of Frames
- Calculation of Page Table Size
- Organization of MMU
- Why Page size power of 2
- Paging Address Calculation: example1
- Paging Numeric Problem: Example2
- Paging Address Calculation: Example3
- Paging Address Calculation: Question1
- Some Important Question 2
- Paging Address Translation: Question3
- UGC NET Paging Question
- GATE Paging Question
- Number of information at Page Entry
- Exams Question on Page Entry Information
- Exam Question: Page Entry Information
- Calculates Page Table Entry Size
- Calculates Page Size
- Calculation of Optimal Page Size
- Question on Optimal Page Size
- Hashed Page Table with Example
- Inverted Page Table with Gate Question
- Question on Inverted Page Table
- Multi-Level Paging
- Multi-level paging: Example1
- Multi-level paging: Example2
- Allocation of Frames
- Subject Mock
GATE Question: FIFO page replacement algorithm
Q: GATE 2010-Q24
A system uses FIFO policy for page replacement. It has 4 page frames with no pages loaded to begin with. The system first accesses 100 distinct pages in some order and then access the same 100 pages but now in the reverse order. How many page faults will occur?
(A) 196 (B) 192 (C) 197 (D) 195
You should know:
FIFO page replacement algorithm, GATE on FIFO page replacement algorithm
Solution:
Given the number of page references is 100 and the number of frames is 4. Initially, the frame is empty.
Now, firstly we request 1 to 100 pages with 4 frames using the FIFO policy.
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Now, after insert all pages from 1 to 100, right now frame contains 97, 98, 99, and 100.
So, number of page fault= 100
Then we request 100 pages again but in the reverse way like pages 100 to 1.
So,
First request page 100, but already in the frame, no page fault.
Next request page 99, already loaded in the frame, so, no page fault.
Next request page 98, it is also in the frame, so, no page fault.
Next request page 97, it is already in the frame, so, no page fault.
Next requirement page 96, the new page not in the frame, so page fault.
Even all requirements from 96 to 1 is not in the frame, so page fault will occur.
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So, second except first 4 pages (100, 99, 98, 97), for all other pages (96 to 1) page faults occur.
So, number of page fault = 96
Number of total page faults when page request 1 to 100 = 10
Number of total page faults when page request in reverse 100 to 1 = 96
Then total page faults = 196 and option (A) is correct.
