View
107000
Login
Register
Home
Materials
Science
Computer Science
NTA NET
Gate
Govt. Exam
BANK
Bank Clerk
Mocks
NTA NET
Computer Science
Gate
Computer Science
Bank Clerk
BANK
Code
Current Affairs
Previous Year
NTA NET
Computer Science
Gate
Computer Science
Bank Clerk
BANK
Exams & Jobs
FOR FREE CONTENT
Sign Up
Materials
Introduction: OS
Booting Process
Command Interpreter
Dual mode of operation
System Calls
Difference between system call and library call
Interrupt and Trap
Kernel
Introduction: Kernel
Monolithic Kernel and Micro Kernel
Hybrid Kernel and Nano Kernel or Pico Kernel
Exo-Kernels
Type of Operating Systems
Batch Processing System
Single-and-Multi-Tasking
Multi-Programming
Single and Multi-User
Time-Sharing Operating Systems
Multi-processing OS
Distributed Operating System
Network Operating System
Real Time Operating System
Template and Clustered OS
Sensor Node and Embedded OS
Handheld and Server OS
Process Management
Introduction: Process Management
CPU and I/O Bounded Process
Foreground and Background Process
Difference between Program and Process
Process Control Block (PCB)
Threads
Process States
Long Term, Short-term and Mid-term Scheduler
Process Context
Context Switch and Dispatcher
CPU Scheduling
Introduction
Scheduling Criteria, Terms and Concepts
Different Type Scheduling Algorithms
First Come First Serve (FCFS)
FCFS Process and Examples
Disadvantage: Convoy Effect
Special Example FCFS with Overhead
Shortest Job First (SJF) Scheduling
SJF Process and Examples
Disadvantages and Prediction Techniques
Question
Shortest Remaining Time First (SRTF) (Preemptive SJF)
SRTF Process and Examples
Special Example of SRTF with CPU and I/O Time
Round Robin Algorithm
Round Robin Process and Examples
Q. (NET exam 2012 Dec, paper III)
Longest Job First
Longest Remaining Time First
Highest Response Ratio Next (HRRN)
Priority Scheduling
Least Completed Next (LCN) Scheduling
Multi-Level Queue Scheduling
Multilevel Feedback Queue Scheduling
Guaranteed Scheduling
Fair Share Scheduling
Lottery Scheduling
Multi-Processor Scheduling
Real-Time CPU Scheduling
Introduction and Properties
Real Time Scheduling Algorithms
Deadline Scheduling
Rate-Monotonic Scheduling
Earliest Deadline First (EDF) Scheduling
EDF scheduling Process and Example
EDF Scheduling Example 2
POSIX Real-Time Scheduling
Priority Inversion
Proportional Share Scheduling
Comparison table of Scheduling Algorithm
Algorithm Evaluation for Scheduling
Inter-process communication and Synchronization
Introduction of Process Synchronization
Race Condition and Critical Section
Process Synchronization as a solution of Critical Section
Requirement of Synchronization mechanisms
Synchronization with Busy Waiting
Software Solution
Lock Variable
Lock variable with priority Inversion Problem
Strict mechanism or Turn variable
Strict mechanism with Special Variable
Peterson Algorithm
Hardware Solutions
Disabling Interrupts
Test and Set (Lock) Instruction Set
Compare and Swap Instruction
Comparison: synchronization solutions with busy waiting
Synchronization Without Busy Waiting
Introduction
Producer and Consumer problem with Race Condition
Problem with fatal race condition?
Semaphore Variables as Solution
Solving the Producer-Consumer Problem Using Semaphores
Type of Semaphore Variable
Counting Semaphore
Concept: Counting Semaphore
Counting Semaphore: Example and question
NET and GATE question: Counting Semaphore
Binary Semaphore
Binary Semaphore and NET-GATE question
Binary Semaphore (Mutex)
Binary Semaphore question on NET and GATE
Classic problems of synchronization
Producer-Consumer Problem Using Semaphores
Reader Writer Problem
Reader Writer Problem: Algorithm
Question of Reader and Writer problem
Dining Philosopher Problem
Dining Philosopher Problem algorithm and example
Dining Philosopher Question-NET and GATE
Sleeping Barber
Cigarette Smoker’s Problem
Barrier Synchronism Algorithm
Barrier synchronism algorithm and example
Related Question GATE
Precedence graph for concurrency programming
Procedure and Example
Question- NET and GATE
MEMORY MANAGEMENT
Important concept of MM
Memory Representation as Address
Memory layout for a Process
Execution of Program and Memory Binding
Execution of Program and Object Code
Address Relocation
Symbol Table
Linker
Linker Definition and Passes
Static and Dynamic Linking
Advantages and disadvantages Dynamic Linking
Loader
Related Questions: SET, NET, GATE and ISRO
Logical and Physical Address Space
Memory Management Technique
Necessity of Memory Management
Contiguous Memory Allocation
Definition: Contiguous Memory Allocation
Fixed Partition: Question GATE
Dynamic Partition
Solution of External Fragmentation: Compaction
Bit Map for Dynamic Partitioning
Algorithms for finding appropriate Holes in Memory
Introductions and list of Algorithms
First Fit and Next Fit
Best Fit and Worst Fit
Quick Fit and 50 percent rule
Questions
Some Related GATE Questions
Protection in Contiguous Memory Allocation
Non-contiguous Memory Allocation
Introduction
Concept of Non-contiguous memory allocation
Paging
Basic concept of Paging
Address Translation
Process of Paging Method
Calculation of Offset for paging
Calculation of Logical Address Bit and number of Pages
Calculation of Physical Address Bit and number of Frames
Calculation of Page Table Size
Organization of MMU
Why Page size power of 2
Paging Address Calculation: example1
Paging Numeric Problem: Example2
Paging Address Calculation: Example3
Paging Address Calculation: Question1
Some Important Question 2
Paging Address Translation: Question3
UGC NET Paging Question
GATE Paging Question
Number of information at Page Entry
Exams Question on Page Entry Information
Exam Question: Page Entry Information
Calculates Page Table Entry Size
Calculates Page Size
Calculation of Optimal Page Size
Question on Optimal Page Size
Hashed Page Table with Example
Inverted Page Table with Gate Question
Question on Inverted Page Table
Multi-Level Paging
Multi-level paging: Example1
Multi-level paging: Example2
Translate Look Ahead Buffer (TLB)
Problem of Paging
Implementation of TLB
Calculate Effective Access Time (EAT)
Effective Access Time using Hit & Miss Ratio
GATE and NET question on calculation EMAT
Examples on calculation EMAT using TLB
TLB with Page Fault
Demand Paging and Page fault
EMAT with Page fault rate
GATE/NET question on EMAT with Page fault
GATE/NET question on EMAT with Page Fault
GATE 2020 question on EMAT, TLB
Allocation of Frames
Page replacement
Introduction of Page replacement
Optimal page replacement algorithm
Concept: Optimal page replacement algorithm
GATE question on optimal algorithm
UGC NET question on optimal algorithm
LRU page replacement algorithm
Least Recently Used (LRU) algorithm
UGC NET question on LRU
GATE question on LRU
FIFO page replacement algorithm
FIFO page replacement algorithm
GATE on FIFO page replacement algorithm
NET on FIFO page replacement algorithm
GATE Question: FIFO page replacement algorithm
Belady's Anomaly
Stack Property
GATE question on Belady's Anomaly
Second Chance page replacement algorithm
Second Chance page replacement algorithm
NET question on Second Chance algorithm
Some other page replacement algorithm
Other page placement algorithms
Sample Questions
Special feature of MRU
Special feature of MRU
Related GATE question on MRU
Working Set algorithm
Concept: Working Set Model
GATE question on working set model
WSClock algorithm
Comparison of page replacement algorithm
One Liner
No items found
Formula
No items found
Question Answer
No items found
Subject Mock
Programming
No items found
Previous Year
Previous Year Mock
Previous Year Solve
Reference Book
No items found
Comparison study for Synchronization solutions with Busy Waiting
Please Login to Bookmark
Share